[all-commits] [llvm/llvm-project] a64998: [RISCV] Share VTYPE encoding code between the asse...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a64998be99e1b692b56e379d3b6a72caebc8512d
      https://github.com/llvm/llvm-project/commit/a64998be99e1b692b56e379d3b6a72caebc8512d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-12-08 (Tue, 08 Dec 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h

  Log Message:
  -----------
  [RISCV] Share VTYPE encoding code between the assembler and the CustomInserter for adding VSETVLI before vector instructions

This merges the SEW and LMUL enums that each used into singles enums in RISCVBaseInfo.h. The patch also adds a new encoding helper to take SEW, LMUL, tail agnostic, mask agnostic and turn it into a vtype immediate.

I also stopped storing the Encoding in the VTYPE operand in the assembler. It is easy to calculate when adding the operand which should only happen once per instruction.

Differential Revision: https://reviews.llvm.org/D92813