[all-commits] [llvm/llvm-project] 195a7a: [AArch64][GlobalISel] Narrow 128-bit regs to 64-bi...

[Jessica Paquette via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 195a7af0abb26915f962462f69c0f17e3835f78b
      https://github.com/llvm/llvm-project/commit/195a7af0abb26915f962462f69c0f17e3835f78b
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2020-12-07 (Mon, 07 Dec 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit

When we have a 128-bit register, emitTestBit would incorrectly narrow to 32
bits always. If the bit number was > 32, then we would need a TB(N)ZX. This
would cause a crash, as we'd have the wrong register class. (PR48379)

This generalizes `narrowExtReg` into `moveScalarRegClass`.

This also allows us to remove `widenGPRBankRegIfNeeded` entirely, since
`selectCopy` correctly handles SUBREG_TO_REG etc.

This does create some codegen changes (since `selectCopy` uses the `all`
regclass variants). However, I think that these will likely be optimized away,
and we can always improve the `selectCopy` code. It looks like we should
revisit `selectCopy` at this point, and possibly refactor it into at least one
`emit` function.

Differential Revision: https://reviews.llvm.org/D92707