[all-commits] [llvm/llvm-project] 03fc4f: [RISCV] Use fcvt.h/d/f.w if the input is an assert...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 03fc4f2e9a66cc316937fc6326fdd9cd51d397d2
      https://github.com/llvm/llvm-project/commit/03fc4f2e9a66cc316937fc6326fdd9cd51d397d2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-12-04 (Fri, 04 Dec 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
    M llvm/test/CodeGen/RISCV/rv64d-double-convert.ll
    M llvm/test/CodeGen/RISCV/rv64f-float-convert.ll
    M llvm/test/CodeGen/RISCV/rv64f-half-convert.ll

  Log Message:
  -----------
  [RISCV] Use fcvt.h/d/f.w if the input is an assertsexti32 not just when the input is sext_inreg.