[all-commits] [llvm/llvm-project] ad923e: [RISCV] Add support for printing pcrel immediates ...
Craig Topper via All-commits
all-commits at lists.llvm.org
Fri Dec 4 10:40:48 PST 2020
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ad923edfc1ce0c0b60e8270954c8d098aab3c3f8
https://github.com/llvm/llvm-project/commit/ad923edfc1ce0c0b60e8270954c8d098aab3c3f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2020-12-04 (Fri, 04 Dec 2020)
Changed paths:
M lld/test/ELF/riscv-branch.s
M lld/test/ELF/riscv-jal.s
M lld/test/ELF/riscv-undefined-weak.s
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
M llvm/test/CodeGen/RISCV/compress.ll
M llvm/test/MC/Disassembler/RISCV/branch-targets.txt
M llvm/test/MC/RISCV/compress-cjal.s
M llvm/test/MC/RISCV/compress-rv32i.s
M llvm/test/MC/RISCV/fixups-compressed.s
M llvm/test/MC/RISCV/fixups.s
M llvm/test/MC/RISCV/rv32-relaxation.s
M llvm/test/MC/RISCV/rv32c-only-valid.s
M llvm/test/MC/RISCV/rv32c-valid.s
M llvm/test/MC/RISCV/rv32e-valid.s
M llvm/test/MC/RISCV/rv32i-valid.s
M llvm/test/MC/RISCV/rv64-relax-all.s
M llvm/test/MC/RISCV/rv64-relaxation.s
M llvm/test/MC/RISCV/rvi-aliases-valid.s
M llvm/test/MC/RISCV/rvv/snippet.s
Log Message:
-----------
[RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump
This makes the llvm-objdump output much more readable and closer to binutils objdump. This builds on D76591
It requires changing the OperandType for certain immediates to "OPERAND_PCREL" so tablegen will generate code to pass the instruction's address. This means we can't do the generic check on these instructions in verifyInstruction any more. Should I add it back with explicit opcode checks? Or should we add a new operand flag to control the passing of address instead of matching the name?
Differential Revision: https://reviews.llvm.org/D92147
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