[all-commits] [llvm/llvm-project] a18d5e: [RISCV] Merge FMV_H_X_RV32/FMV_H_X_RV64 into a sin...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a18d5e3e9fe40aa127730adeeff22b484afecf4e
      https://github.com/llvm/llvm-project/commit/a18d5e3e9fe40aa127730adeeff22b484afecf4e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-12-03 (Thu, 03 Dec 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td

  Log Message:
  -----------
  [RISCV] Merge FMV_H_X_RV32/FMV_H_X_RV64 into a single opcode. Same with FMV_X_ANYEXTH_RV32/RV64

Rather than having a different opcode for RV32 and RV64. Let's just say the integer type is XLenVT and use a single opcode for both modes.

Differential Revision: https://reviews.llvm.org/D92538