[all-commits] [llvm/llvm-project] 1d1234: OpaquePtr: Update more tests to use typed sret

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1d1234b2a4286eebb89ea5e9796098f308c553d2
      https://github.com/llvm/llvm-project/commit/1d1234b2a4286eebb89ea5e9796098f308c553d2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-11-20 (Fri, 20 Nov 2020)

  Changed paths:
    M llvm/test/Analysis/Lint/noalias-byval.ll
    M llvm/test/Analysis/MemoryDependenceAnalysis/invariant.group-bug.ll
    M llvm/test/Assembler/sret-type-attr.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
    M llvm/test/CodeGen/AArch64/swiftself.ll
    M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
    M llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll
    M llvm/test/CodeGen/ARM/interval-update-remat.ll
    M llvm/test/CodeGen/ARM/swiftself.ll
    M llvm/test/CodeGen/Hexagon/calling-conv-2.ll
    M llvm/test/CodeGen/Hexagon/calling-conv.ll
    M llvm/test/CodeGen/Hexagon/expand-condsets-pred-undef.ll
    M llvm/test/CodeGen/Hexagon/opt-addr-mode-subreg-use.ll
    M llvm/test/CodeGen/Hexagon/regscavengerbug.ll
    M llvm/test/CodeGen/PowerPC/ppc64-smallarg.ll
    M llvm/test/CodeGen/PowerPC/ppc64le-smallarg.ll
    M llvm/test/CodeGen/PowerPC/resolvefi-basereg.ll
    M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
    M llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll
    M llvm/test/CodeGen/Thumb2/constant-islands.ll
    M llvm/test/CodeGen/X86/combine-sbb.ll
    M llvm/test/CodeGen/X86/misched-aa-colored.ll
    M llvm/test/CodeGen/X86/movtopush.ll
    M llvm/test/CodeGen/X86/negate-add-zero.ll
    M llvm/test/CodeGen/X86/preallocated.ll
    M llvm/test/CodeGen/X86/scev-interchange.ll
    M llvm/test/CodeGen/X86/win32_sret.ll
    M llvm/test/Transforms/Attributor/reduced/register_benchmark_test.ll
    M llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/combined-partial-overwrites.ll
    M llvm/test/Transforms/IndVarSimplify/interesting-invoke-use.ll
    M llvm/test/Transforms/InstCombine/insert-val-extract-elem.ll
    M llvm/test/Transforms/MemCpyOpt/memcpy.ll
    M llvm/test/Transforms/MemCpyOpt/sret.ll
    M llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll

  Log Message:
  -----------
  OpaquePtr: Update more tests to use typed sret


  Commit: 650fbd569a34960944d20d02b578e9be860453a7
      https://github.com/llvm/llvm-project/commit/650fbd569a34960944d20d02b578e9be860453a7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-11-20 (Fri, 20 Nov 2020)

  Changed paths:
    M llvm/lib/IR/Verifier.cpp
    M llvm/test/Verifier/byval-1.ll
    M llvm/test/Verifier/preallocated-invalid.ll
    M llvm/test/Verifier/sret.ll

  Log Message:
  -----------
  Verifier: Fix assert when verifying non-pointer byval or preallocated

This would fail on a cast<PointerType> when verifying the attribute if
these attributes were incorrectly used with a non-pointer type.


Compare: https://github.com/llvm/llvm-project/compare/755674b715b1...650fbd569a34