[all-commits] [llvm/llvm-project] d8ff26: [lldb] Add explicit 64-bit fip/fdp registers on x8...

[Michał Górny via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d8ff269f677621a773d75c79d50bb3f59a6b052e
      https://github.com/llvm/llvm-project/commit/d8ff269f677621a773d75c79d50bb3f59a6b052e
  Author: Michał Górny <mgorny at moritz.systems>
  Date:   2020-11-19 (Thu, 19 Nov 2020)

  Changed paths:
    M lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
    M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
    M lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
    M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
    M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h
    M lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
    M lldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h
    A lldb/test/Shell/Register/x86-64-fp-read.test
    M lldb/test/Shell/Register/x86-64-fp-write.test
    M lldb/test/Shell/Register/x86-fp-read.test
    M lldb/test/Shell/Register/x86-fp-write.test
    M lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp

  Log Message:
  -----------
  [lldb] Add explicit 64-bit fip/fdp registers on x86_64

The FXSAVE/XSAVE data can have two different layouts on x86_64.  When
called as FXSAVE/XSAVE..., the Instruction Pointer and Address Pointer
registers are reported using a 16-bit segment identifier and a 32-bit
offset.  When called as FXSAVE64/XSAVE64..., they are reported using
a complete 64-bit offsets instead.

LLDB has historically followed GDB and unconditionally used to assume
the 32-bit layout, with the slight modification of possibly
using a 32-bit segment register (i.e. extending the register into
the reserved 16 upper bits).  When the underlying operating system used
FXSAVE64/XSAVE64..., the pointer was split into two halves,
with the upper half repored as the segment registers.  While
reconstructing the full address was possible on the user end (and e.g.
the FPU register tests did that), it certainly was not the most
convenient option.

Introduce a two additional 'fip' and 'fdp' registers that overlap
with 'fiseg'/'fioff' and 'foseg'/'foff' respectively, and report
the complete 64-bit address.

Differential Revision: https://reviews.llvm.org/D91497


  Commit: c43abf043692babf9ad4f8bded2fdf6ab9c354b0
      https://github.com/llvm/llvm-project/commit/c43abf043692babf9ad4f8bded2fdf6ab9c354b0
  Author: Michał Górny <mgorny at moritz.systems>
  Date:   2020-11-19 (Thu, 19 Nov 2020)

  Changed paths:
    M lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
    M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp
    M lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
    M lldb/source/Plugins/Process/Utility/CMakeLists.txt
    A lldb/source/Plugins/Process/Utility/RegisterContext_x86.cpp
    M lldb/source/Plugins/Process/Utility/RegisterContext_x86.h
    M lldb/test/Shell/Register/x86-64-fp-read.test
    M lldb/test/Shell/Register/x86-64-fp-write.test
    M lldb/test/Shell/Register/x86-fp-read.test
    M lldb/test/Shell/Register/x86-fp-write.test
    M lldb/unittests/Process/Utility/CMakeLists.txt
    A lldb/unittests/Process/Utility/RegisterContextTest.cpp

  Log Message:
  -----------
  [lldb] Use translated full ftag values

Translate between abridged and full ftag values in order to expose
the latter in the gdb-remote protocol while the former are used by
FXSAVE/XSAVE...  This matches the gdb behavior.

Differential Revision: https://reviews.llvm.org/D91504


Compare: https://github.com/llvm/llvm-project/compare/14ae02fb3397...c43abf043692