[all-commits] [llvm/llvm-project] 1983ac: [SelDAGBuilder] Do not require simple VTs for cons...

[Florian Hahn via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1983acce7c4da01d8fb33b3b3465619f973edd49
      https://github.com/llvm/llvm-project/commit/1983acce7c4da01d8fb33b3b3465619f973edd49
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2020-11-19 (Thu, 19 Nov 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/AArch64/arm64-inline-asm.ll
    M llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll

  Log Message:
  -----------
  [SelDAGBuilder] Do not require simple VTs for constraints.

In some cases, the values passed to `asm sideeffect` calls cannot be
mapped directly to simple MVTs. Currently, we crash in the backend if
that happens. An example can be found in the @test_vector_too_large_r_m
test case, where we pass <9 x float> vectors. In practice, this can
happen in cases like the simple C example below.

using vec = float __attribute__((ext_vector_type(9)));
void f1 (vec m) {
  asm volatile("" : "+r,m"(m) : : "memory");
}

One case that use "+r,m" constraints for arbitrary data types in
practice is google-benchmark's DoNotOptimize.

This patch updates visitInlineAsm so that it use MVT::Other for
constraints with complex VTs. It looks like the rest of the backend
correctly deals with that and properly legalizes the type.

And we still report an error if there are no registers to satisfy the
constraint.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D91710