[all-commits] [llvm/llvm-project] 661e40: [LLDB] Fix SVE reginfo for sequential offset in g ...
Muhammad Omair Javaid via All-commits
all-commits at lists.llvm.org
Tue Nov 17 04:19:06 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 661e4040ac60b3df06b2495ea916302b35d9bac2
https://github.com/llvm/llvm-project/commit/661e4040ac60b3df06b2495ea916302b35d9bac2
Author: Muhammad Omair Javaid <omair.javaid at linaro.org>
Date: 2020-11-17 (Tue, 17 Nov 2020)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
Log Message:
-----------
[LLDB] Fix SVE reginfo for sequential offset in g packet
This moves in the direction of our effort to synchronize register descriptions
between LLDB and GDB xml description. We want to able to send registers in a
way that their offset fields can be re-constructed based on register sizes
in the increasing order of register number.
In context to Arm64 SVE, FPCR and FPSR are same registers in FPU regset and
SVE regset. Previously FPSR/FPCR offset was set at the end of SVE data
because Linux ptrace data placed FPCR and FPSR at the end of SVE register set.
Considering interoperability with other stubs like QEMU and that g packets
should generate register data in increasing order of register numbers. We
have to move FPCR/FPSR offset up to its original location according to
register numbering scheme of ARM64 registers with SVE registers included.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D90741
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