[all-commits] [llvm/llvm-project] e56103: [InstCombine] add multi-use demanded bits fold for...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e56103d25016c9ce4e98f652ac1a09379793ccf5
      https://github.com/llvm/llvm-project/commit/e56103d25016c9ce4e98f652ac1a09379793ccf5
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-11-15 (Sun, 15 Nov 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/and.ll
    M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
    M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
    M llvm/test/Transforms/LoopVectorize/runtime-check.ll
    M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll

  Log Message:
  -----------
  [InstCombine] add multi-use demanded bits fold for add with low-bit mask

I noticed an add example like the one from D91343, so here's a similar patch.
The logic is based on existing code for the single-use demanded bits fold.
But I only matched a constant instead of using compute known bits on the
operands because that was the motivating patterni that I noticed.

I think this will allow removing a special-case (but incomplete) dedicated
fold within visitAnd(), but I need to untangle the existing code to be sure.

https://rise4fun.com/Alive/V6fP

  Name: add with low mask
  Pre: (C1 & (-1 u>> countLeadingZeros(C2))) == 0
  %a = add i8 %x, C1
  %r = and i8 %a, C2
  =>
  %r = and i8 %x, C2

Differential Revision: https://reviews.llvm.org/D91415