[all-commits] [llvm/llvm-project] 0add5f: [RISCV] Don't include CodeGen layer files in MC layer

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0add5f912296036b27686ec5ca7704a541f734fd
      https://github.com/llvm/llvm-project/commit/0add5f912296036b27686ec5ca7704a541f734fd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-12 (Thu, 12 Nov 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h

  Log Message:
  -----------
  [RISCV] Don't include CodeGen layer files in MC layer

-Use MCRegister instead of Register in MC layer.
-Move some enums from RISCVInstrInfo.h to RISCVBaseInfo.h to be with other TSFlags bits.

Differential Revision: https://reviews.llvm.org/D91114