[all-commits] [llvm/llvm-project] 8262e9: [ARM] Fix PR 47980: Use constrainRegClass during f...
pirama-arumuga-nainar via All-commits
all-commits at lists.llvm.org
Tue Nov 10 13:40:41 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 8262e94a6da77e176dbd13d9eadce76da74489d4
https://github.com/llvm/llvm-project/commit/8262e94a6da77e176dbd13d9eadce76da74489d4
Author: Pirama Arumuga Nainar <pirama at google.com>
Date: 2020-11-10 (Tue, 10 Nov 2020)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
A llvm/test/CodeGen/ARM/peephole-callee-save-regalloc.mir
Log Message:
-----------
[ARM] Fix PR 47980: Use constrainRegClass during foldImmediate opt.
Previously we used setRegClass to rgpr, which may expand the register
domain if the result was already in a constrained class (tcgpr in the
above PR).
Differential Revision: https://reviews.llvm.org/D91192
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