[all-commits] [llvm/llvm-project] 6e0ad5: [PowerPC] Add an ISEL pattern for Mul with Imm.

[Esme via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6e0ad5bc8c34592646a1106e4a0a40f6d7dd5726
      https://github.com/llvm/llvm-project/commit/6e0ad5bc8c34592646a1106e4a0a40f6d7dd5726
  Author: Esme-Yi <esme.yi at ibm.com>
  Date:   2020-11-10 (Tue, 10 Nov 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/test/CodeGen/PowerPC/mulli.ll

  Log Message:
  -----------
  [PowerPC] Add an ISEL pattern for Mul with Imm.

Summary: This patch try to do the following transformation if the multiplier doen't fit int16:
			(mul X, c1 << c2) -> (rldicr (mulli X, c1) c2)

Reviewed By: jsji, steven.zhang

Differential Revision: https://reviews.llvm.org/D87384