[all-commits] [llvm/llvm-project] 16dccf: [RISCV] Add test case to show incorrect matching t...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 16dccf716a721ac757805104263e89a12898642e
      https://github.com/llvm/llvm-project/commit/16dccf716a721ac757805104263e89a12898642e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-06 (Fri, 06 Nov 2020)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rv64Zbb.ll

  Log Message:
  -----------
  [RISCV] Add test case to show incorrect matching to sroiw when the or mask does not have 1s in the upper 32 bits.

The matching code for sroiw is truncating the mask to 32 bits before
checking its value. We need to check all 64 bits.