[all-commits] [llvm/llvm-project] 4a4f4f: [RISCV] Add test cases to show missed opportunitie...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a4f4f78cb96c3e144929a416a9ee4ab7b419607
      https://github.com/llvm/llvm-project/commit/4a4f4f78cb96c3e144929a416a9ee4ab7b419607
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-05 (Thu, 05 Nov 2020)

  Changed paths:
    M llvm/test/CodeGen/RISCV/double-arith.ll
    M llvm/test/CodeGen/RISCV/float-arith.ll

  Log Message:
  -----------
  [RISCV] Add test cases to show missed opportunities to use fnmadd/fnmsub if the second operand to the fma is negated rather than the first. NFC

We need to add more isel patterns to handle this.


  Commit: defe11866a326491ee9767f84bb3f70cfc4f4bcb
      https://github.com/llvm/llvm-project/commit/defe11866a326491ee9767f84bb3f70cfc4f4bcb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-05 (Thu, 05 Nov 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/test/CodeGen/RISCV/double-arith.ll
    M llvm/test/CodeGen/RISCV/float-arith.ll

  Log Message:
  -----------
  [RISCV] Add isel patterns for fnmadd/fnmsub with an fneg on the second operand instead of the first.

The multiply part of FMA is commutable, but TargetSelectionDAG.td
doesn't have it marked as commutable so tablegen won't automatically
create the additional patterns.

So manually add commuted patterns.


Compare: https://github.com/llvm/llvm-project/compare/ca17571051d4...defe11866a32