[all-commits] [llvm/llvm-project] c62358: [RISCV] Add isel patterns for fshl with immediate ...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c623584b6ffacbac6aa012515dab57423cb9f851
      https://github.com/llvm/llvm-project/commit/c623584b6ffacbac6aa012515dab57423cb9f851
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-05 (Thu, 05 Nov 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoB.td
    M llvm/test/CodeGen/RISCV/rv32Zbb.ll
    M llvm/test/CodeGen/RISCV/rv32Zbbp.ll
    M llvm/test/CodeGen/RISCV/rv32Zbt.ll
    M llvm/test/CodeGen/RISCV/rv64Zbt.ll

  Log Message:
  -----------
  [RISCV] Add isel patterns for fshl with immediate to select FSRI/FSRIW

There is no FSLI instruction, but we can emulate it using FSRI by swapping operands and subtracting the immediate from the bitwidth.

Differential Revision: https://reviews.llvm.org/D90826