[all-commits] [llvm/llvm-project] f2412d: [SVE][CodeGen] Lower scalable integer vector reduc...

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f2412d372d93b8c9f6e08fd2166e1e161ba4e6f8
      https://github.com/llvm/llvm-project/commit/f2412d372d93b8c9f6e08fd2166e1e161ba4e6f8
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2020-11-04 (Wed, 04 Nov 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    A llvm/test/CodeGen/AArch64/sve-int-pred-reduce.ll
    A llvm/test/CodeGen/AArch64/sve-int-reduce.ll
    A llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
    A llvm/test/CodeGen/AArch64/sve-split-int-reduce.ll
    M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll

  Log Message:
  -----------
  [SVE][CodeGen] Lower scalable integer vector reductions

This patch uses the existing LowerFixedLengthReductionToSVE function to also lower
scalable vector reductions. A separate function has been added to lower VECREDUCE_AND
& VECREDUCE_OR operations with predicate types using ptest.

Lowering scalable floating-point reductions will be addressed in a follow up patch,
for now these will hit the assertion added to expandVecReduce() in TargetLowering.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D89382