[all-commits] [llvm/llvm-project] 22c383: [RISCV] Remove include of RISCVRegisterInfo.h from...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 22c38376345670c1883963e5e1cccd597a15b3a5
      https://github.com/llvm/llvm-project/commit/22c38376345670c1883963e5e1cccd597a15b3a5
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-10-29 (Thu, 29 Oct 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
    M llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h

  Log Message:
  -----------
  [RISCV] Remove include of RISCVRegisterInfo.h from RISCVBaseInfo.h

RISCVRegisterInfo.h is part of the CodeGen layer. The Utils library
is intended to be shared with the MC layer so shouldn't use files
from the CodeGen layer.

The register enum names are already available from
RISCVMCTargetDesc.h. It appears what was coming from this include
was a transitive include of the Register class which I've replaced
with MCRegister. Register has a constructor from MCRegister so it
should be convertible.