[all-commits] [llvm/llvm-project] 58de4b: [AMDGPU] Use pseudo instructions for readlane/writ...
Jay Foad via All-commits
all-commits at lists.llvm.org
Thu Oct 29 09:03:43 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 58de4b205310d18614eabdcbaa1772e9fc090df3
https://github.com/llvm/llvm-project/commit/58de4b205310d18614eabdcbaa1772e9fc090df3
Author: Jay Foad <jay.foad at amd.com>
Date: 2020-10-29 (Thu, 29 Oct 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/csr-gfx10.ll
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
Log Message:
-----------
[AMDGPU] Use pseudo instructions for readlane/writelane
This reverts r227987 "R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2".
All the codegen changes are caused by the post-RA scheduler no longer
treating readlane/writelane as scheduling barriers due to having
unmodelled side effects. (The pseudos are hasSideEffects = 0, but the
real instructions are hasSideEffects = ? which TableGen conservatively
treats as 1.)
Differential Revision: https://reviews.llvm.org/D90401
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