[all-commits] [llvm/llvm-project] 066737: [AArch64] Remove AArch64ISD::NOT, use vnot instead

[David Green via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 066737fdbc8fe22c48649c388ff2421d596ba2a8
      https://github.com/llvm/llvm-project/commit/066737fdbc8fe22c48649c388ff2421d596ba2a8
  Author: David Green <david.green at arm.com>
  Date:   2020-10-28 (Wed, 28 Oct 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
    M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
    M llvm/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/AArch64/urem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/AArch64/vec_umulo.ll

  Log Message:
  -----------
  [AArch64] Remove AArch64ISD::NOT, use vnot instead

vnot (xor -1) should be equivalent to the AArch64 specific AArch64ISD::NOT
node, but allow more folding thanks to all the target independent
optimizations. Specifically this allows select(icmp ne, x, y) to
become "cmeq; bsl y, x" as opposed to needing to convert the predicate
with "cmeq; mvn; bsl x, y"

Unfortunately there is a regression in a cmtst test, but the code it
selected from was already non-canonical, with instcombine preferring to
use an eq predicate instead. Plus the more common case of icmp ne is
improved.

Differential Revision: https://reviews.llvm.org/D90126