[all-commits] [llvm/llvm-project] 2e64ad: [AMDGPU] Fixed isLegalRegOperand() with physregs

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2e64ad94948763a4f9a289265dbce4ce1d22591b
      https://github.com/llvm/llvm-project/commit/2e64ad94948763a4f9a289265dbce4ce1d22591b
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2020-10-23 (Fri, 23 Oct 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

  Log Message:
  -----------
  [AMDGPU] Fixed isLegalRegOperand() with physregs

This does not change anything at the moment, but needed for
D89170. In that change I am probing a physical SGPR to see if
it is legal. RC is SReg_32, but DRC for scratch instructions
is SReg_32_XEXEC_HI and test fails.

That is sufficient just to check if DRC contains a register
here in case of physreg. Physregs also do not use subregs
so the subreg handling below is irrelevant for these.

Differential Revision: https://reviews.llvm.org/D90064