[all-commits] [llvm/llvm-project] 281e0f: [mlir] Simplify DDR matching patterns with equal o...

[Roman Dzhabarov via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 281e0f3636a3169df88965632579701b101be51f
      https://github.com/llvm/llvm-project/commit/281e0f3636a3169df88965632579701b101be51f
  Author: rdzhabarov <rdzhabarov at google.com>
  Date:   2020-10-21 (Wed, 21 Oct 2020)

  Changed paths:
    M mlir/docs/DeclarativeRewrites.md
    M mlir/include/mlir/IR/OpBase.td
    M mlir/lib/Dialect/Shape/IR/ShapeCanonicalization.td

  Log Message:
  -----------
  [mlir] Simplify DDR matching patterns with equal operands for operators where it's applicable. Added documentation.

This https://reviews.llvm.org/D89254 diff introduced implicit matching between same name operands.

Differential Revision: https://reviews.llvm.org/D89598