[all-commits] [llvm/llvm-project] 01549d: [AMDGPU] Base getSubRegFromChannel on TableGen data

[Carl Ritson via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 01549dd976faa93dcf18d7363ccf8b2509833f7c
      https://github.com/llvm/llvm-project/commit/01549dd976faa93dcf18d7363ccf8b2509833f7c
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2020-10-14 (Wed, 14 Oct 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h

  Log Message:
  -----------
  [AMDGPU] Base getSubRegFromChannel on TableGen data

Generate (at runtime) the table used to drive getSubRegFromChannel,
base on AMDGPUSubRegIdxRanges from TableGen data.
The is a step closer to it being staticly generated by TableGen and
allows getSubRegFromChannel handle all bitwidths in the mean time.

Reviewed By: rampitec, arsenm, foad

Differential Revision: https://reviews.llvm.org/D89217