[all-commits] [llvm/llvm-project] c78da0: [clang] Improve handling of physical registers in ...

[Jonas Paulsson via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c78da037783bda0f27f4d82060149166e6f0c796
      https://github.com/llvm/llvm-project/commit/c78da037783bda0f27f4d82060149166e6f0c796
  Author: Jonas Paulsson <paulsson at linux.vnet.ibm.com>
  Date:   2020-10-13 (Tue, 13 Oct 2020)

  Changed paths:
    M clang/lib/CodeGen/CGStmt.cpp
    A clang/test/CodeGen/systemz-inline-asm-02.c
    M clang/test/CodeGen/systemz-inline-asm.c

  Log Message:
  -----------
  [clang] Improve handling of physical registers in inline assembly operands.

Change EmitAsmStmt() to

- Not tie physregs with the "+r" constraint, but instead add the hard
  register as an input constraint. This makes "+r" and "=r":"r" look the same
  in the output.

  Background: Macro intensive user code may contain inline assembly
  statements with multiple operands constrained to the same physreg. Such a
  case (with the operand constraints "+r" : "r") currently triggers the
  TwoAddressInstructionPass assertion against any extra use of a tied
  register. Furthermore, TwoAddress will insert a COPY to that physreg even
  though isel has already done so (for the non-tied use), which may lead to a
  second redundant instruction currently. A simple fix for this is to not
  emit tied physreg uses in the first place for the "+r" constraint, which is
  what this patch does.

- Give an error on multiple outputs to the same physical register.

  This should be reported and this is also what GCC does.

Review: Ulrich Weigand, Aaron Ballman, Jennifer Yu, Craig Topper

Differential Revision: https://reviews.llvm.org/D87279