[all-commits] [llvm/llvm-project] 080e6b: [InstCombine] allow vector splats for add+and with...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 080e6bc2050e28ae198d82f0e934ca7b4548c3b7
      https://github.com/llvm/llvm-project/commit/080e6bc2050e28ae198d82f0e934ca7b4548c3b7
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-10-09 (Fri, 09 Oct 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    M llvm/test/Transforms/InstCombine/add.ll

  Log Message:
  -----------
  [InstCombine] allow vector splats for add+and with high-mask

There might be a better way to specify the pre-conditions,
but this is hopefully clearer than the way it was written:
https://rise4fun.com/Alive/Jhk3

  Pre: C2 < 0 && isShiftedMask(C2) && (C1 == C1 & C2)
  %a = and %x, C2
  %r = add %a, C1
  =>
  %a2 = add %x, C1
  %r = and %a2, C2