[all-commits] [llvm/llvm-project] 2a0ca1: [InstCombine] collectBitParts - add fshl/fshr hand...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a0ca17f66f7776ade251fd40dc9a4f981b2a673
      https://github.com/llvm/llvm-project/commit/2a0ca17f66f7776ade251fd40dc9a4f981b2a673
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-09-25 (Fri, 25 Sep 2020)

  Changed paths:
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/test/Transforms/InstCombine/bswap.ll

  Log Message:
  -----------
  [InstCombine] collectBitParts - add fshl/fshr handling

Pulled from D87452, this is a fixed version of the collectBitParts fshl/fshr handling which as @nikic noticed wasn't checking for different providers or had correct bit ordering (which was hid by only testing shift amounts of bitwidth/2).

Differential Revision: https://reviews.llvm.org/D88292