[all-commits] [llvm/llvm-project] 283036: [X86][SSE] combineVectorTruncation - enable (pre-S...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 283036394ee606401ebb6601bb97b500e11a2830
      https://github.com/llvm/llvm-project/commit/283036394ee606401ebb6601bb97b500e11a2830
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-09-24 (Thu, 24 Sep 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/masked_store_trunc.ll
    M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
    M llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
    M llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
    M llvm/test/CodeGen/X86/vector-trunc-math.ll
    M llvm/test/CodeGen/X86/vector-trunc.ll

  Log Message:
  -----------
  [X86][SSE] combineVectorTruncation - enable (pre-SSSE3) vXi16->vXi8 truncation.

Shuffle combining can now handle this output, and by performing this early in combineVectorTruncation we avoid a scalarization that caused a regression on D87502.