[all-commits] [llvm/llvm-project] ff00b5: [MLIR] Normalize memrefs in LoadOp and StoreOp of ...

[Haruki Imai via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ff00b58392527419ea32d0b97575ef973c1bd085
      https://github.com/llvm/llvm-project/commit/ff00b58392527419ea32d0b97575ef973c1bd085
  Author: Haruki Imai <imaihal at jp.ibm.com>
  Date:   2020-09-24 (Thu, 24 Sep 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
    M mlir/test/Transforms/normalize-memrefs-ops.mlir

  Log Message:
  -----------
  [MLIR] Normalize memrefs in LoadOp and StoreOp of Standard Ops

Added a trait, `MemRefsNormalizable` in LoadOp and StoreOp of Standard Ops
to normalize input memrefs in LoadOp and StoreOp.

Related revision: https://reviews.llvm.org/D86236

Differential Revision: https://reviews.llvm.org/D88156