[all-commits] [llvm/llvm-project] a513fd: [AArch64][GlobalISel] Add a post-legalize combine ...

[AE via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a513fdec90de6b0719e8dc4f079bbdd78eb9aaf1
      https://github.com/llvm/llvm-project/commit/a513fdec90de6b0719e8dc4f079bbdd78eb9aaf1
  Author: Amara Emerson <amara at apple.com>
  Date:   2020-09-21 (Mon, 21 Sep 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Combine.td
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-vashr-vlshr.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Add a post-legalize combine for lowering vector-immediate G_ASHR/G_LSHR.

In order to select the immediate forms using the imported patterns, we need to
lower them into new G_VASHR/G_VLSHR target generic ops. Add a combine to do this
matching build_vector of constant operands.

With this, we get selection for free.


  Commit: e3f5046e44772d41632796389716930bafa96b74
      https://github.com/llvm/llvm-project/commit/e3f5046e44772d41632796389716930bafa96b74
  Author: Amara Emerson <amara at apple.com>
  Date:   2020-09-21 (Mon, 21 Sep 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Merge selection of vector-vector G_ASHR/G_LSHR and support more cases.

The vector-immediate cases are handled elsewhere in an earlier commit.


Compare: https://github.com/llvm/llvm-project/compare/3a799deed729...e3f5046e4477