[all-commits] [llvm/llvm-project] 0576f4: AMDGPU: Don't sometimes allow instructions before ...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Fri Sep 18 10:43:20 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0576f436e577cede25810729aef236ec8c649446
      https://github.com/llvm/llvm-project/commit/0576f436e577cede25810729aef236ec8c649446
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-09-18 (Fri, 18 Sep 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
    M llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
    M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir

  Log Message:
  -----------
  AMDGPU: Don't sometimes allow instructions before lowered si_end_cf

Since 6524a7a2b9ca072bd7f7b4355d1230e70c679d2f, this would sometimes
not emit the or to exec at the beginning of the block, where it really
has to be. If there is an instruction that defines one of the source
operands, split the block and turn the si_end_cf into a terminator.

This avoids regressions when regalloc fast is switched to inserting
reloads at the beginning of the block, instead of spills at the end of
the block.

In a future change, this should always split the block.




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