[all-commits] [llvm/llvm-project] 992698: [AArch64] Emit zext move when the source of the ze...

[Andrew Wei via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 992698cfbc898c556fa98962540bd273b115e35c
      https://github.com/llvm/llvm-project/commit/992698cfbc898c556fa98962540bd273b115e35c
  Author: Andrew Wei <weiwei64 at huawei.com>
  Date:   2020-09-18 (Fri, 18 Sep 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/shift_minsize.ll

  Log Message:
  -----------
  [AArch64] Emit zext move when the source of the zext is AssertZext or AssertSext

When the source of the zext is AssertZext or AssertSext, it is hard to know any information about the upper 32 bits,
so we should insert a zext move before emitting SUBREG_TO_REG to define the lower 32 bits.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87771