[all-commits] [llvm/llvm-project] bea774: [AArch64][GlobalISel] Make <8 x s16> and <16 x s8>...
AE via All-commits
all-commits at lists.llvm.org
Thu Sep 17 11:50:54 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: bea7749d0364a8c694f236a97d58167a33efdb9e
https://github.com/llvm/llvm-project/commit/bea7749d0364a8c694f236a97d58167a33efdb9e
Author: Amara Emerson <amara at apple.com>
Date: 2020-09-17 (Thu, 17 Sep 2020)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[AArch64][GlobalISel] Make <8 x s16> and <16 x s8> legal for shifts.
Commit: 7d5b10348371644c69041965b9864886e9961ddd
https://github.com/llvm/llvm-project/commit/7d5b10348371644c69041965b9864886e9961ddd
Author: Amara Emerson <amara at apple.com>
Date: 2020-09-17 (Thu, 17 Sep 2020)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
Log Message:
-----------
[AArch64][GlobalISel] Widen G_EXTRACT_VECTOR_ELT element types if < 8b.
In order to not unnecessarily promote the source vector to greater than our
native vector size of 128b, I've added some cascading rules to widen based on
the number of elements.
Compare: https://github.com/llvm/llvm-project/compare/48a23bccf373...7d5b10348371
More information about the All-commits
mailing list