[all-commits] [llvm/llvm-project] 528554: [PowerPC] Set the mayRaiseFPException for FCMPUS/F...

[QingShan Zhang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 528554c39b098e2d9a9c7ec51c77717aa07db2a2
      https://github.com/llvm/llvm-project/commit/528554c39b098e2d9a9c7ec51c77717aa07db2a2
  Author: QingShan Zhang <qshanz at cn.ibm.com>
  Date:   2020-09-12 (Sat, 12 Sep 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    A llvm/test/CodeGen/PowerPC/nofpexcept.ll

  Log Message:
  -----------
  [PowerPC] Set the mayRaiseFPException for FCMPUS/FCMPUD

>From ISA, fcmpu will raise the Floating-Point Invalid Operation
Exception (SNaN) if either of the operands is a Signaling NaN by setting
the bit VXSNAN. But the instruction description didn't set the
mayRaiseFPException which might have impact on the scheduling or some
backend optimization.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D83937