[all-commits] [llvm/llvm-project] 002f5a: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 002f5ab3b171c7d9c9ea192b04a5303be78f6e52
      https://github.com/llvm/llvm-project/commit/002f5ab3b171c7d9c9ea192b04a5303be78f6e52
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2020-09-11 (Fri, 11 Sep 2020)

  Changed paths:
    M clang/lib/AST/ItaniumMangle.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/CodeGen/TargetInfo.cpp
    M clang/test/CodeGen/attr-arm-sve-vector-bits-types.c

  Log Message:
  -----------
  [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

The element types of scalable vectors are defined in terms of stdint
types in the ACLE. This patch fixes the mapping to builtin types for the
ILP32 ABI when creating VLS types with the arm_sve_vector_bits, where
the mapping is as follows:

  int32_t -> LongTy
  int64_t -> LongLongTy
  uint32_t -> UnsignedLongTy
  uint64_t -> UnsignedLongLongTy

This is implemented by leveraging getBuiltinVectorTypeInfo which is
target agnostic since it calls ASTContext::getIntTypeForBitwidth for
integer types. The element type for svfloat16_t is changed from
Float16Ty to HalfTy when creating VLS types since this is what is used
elsewhere.

For more information, see:

https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#types-varying-by-data-model
https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#appendix-support-for-scalable-vectors

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87358