[all-commits] [llvm/llvm-project] b90432: [DAGCombiner] Enhance (zext(setcc))

[bzEq via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b904324788a8446791dbfbfd9c716644dbac283e
      https://github.com/llvm/llvm-project/commit/b904324788a8446791dbfbfd9c716644dbac283e
  Author: Kai Luo <lkail at cn.ibm.com>
  Date:   2020-08-29 (Sat, 29 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
    M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
    M llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
    M llvm/test/CodeGen/PowerPC/setcc-logic.ll
    M llvm/test/CodeGen/PowerPC/signbit-shift.ll

  Log Message:
  -----------
  [DAGCombiner] Enhance (zext(setcc))

Current `v:t = zext(setcc x,y,cc)` will be transformed to `select x, y, 1:t, 0:t, cc`. It misses some opportunities if x's type size is less than `t`'s size. This patch enhances the above transformation.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D86687