[all-commits] [llvm/llvm-project] 2259ce: [RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as ...

[Alexander Richardson via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2259ce8c9116e2fd057332a1ede08396e8d64d30
      https://github.com/llvm/llvm-project/commit/2259ce8c9116e2fd057332a1ede08396e8d64d30
  Author: Alex Richardson <Alexander.Richardson at cl.cam.ac.uk>
  Date:   2020-08-27 (Thu, 27 Aug 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/atomic-rmw.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
    M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
    M llvm/test/CodeGen/RISCV/vararg.ll

  Log Message:
  -----------
  [RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as a move

The isTriviallyRematerializable hook is only called for instructions that are
tagged as isAsCheapAsAMove. Since ADDI 0 is used for "mv" it should definitely
be marked with "isAsCheapAsAMove". This change avoids one stack spill in most of
the atomic-rmw.ll tests functions. It also avoids stack spills in two of our
out-of-tree CHERI tests.
ORI/XORI with zero may or may not be the same as a move micro-architecturally,
but since we are already doing it for register == x0, we might as well
do the same if the immediate is zero.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D86480


  Commit: a11eeb4d4a99f61c2626ce2c0d44175a9eaa2c59
      https://github.com/llvm/llvm-project/commit/a11eeb4d4a99f61c2626ce2c0d44175a9eaa2c59
  Author: Alex Richardson <Alexander.Richardson at cl.cam.ac.uk>
  Date:   2020-08-27 (Thu, 27 Aug 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td

  Log Message:
  -----------
  [RISC-V] Mark C_MV as a move instruction

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D86517


  Commit: 5ba4d0365b36de440d82b4672ccd41a5a7dd4592
      https://github.com/llvm/llvm-project/commit/5ba4d0365b36de440d82b4672ccd41a5a7dd4592
  Author: Alex Richardson <Alexander.Richardson at cl.cam.ac.uk>
  Date:   2020-08-27 (Thu, 27 Aug 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

  Log Message:
  -----------
  [RISC-V] fmv.s/fmv.d should be as cheap as a move

Since the canonical floatig-point move is fsgnj rd, rs, rs, we should
handle this case in RISCVInstrInfo::isAsCheapAsAMove().

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D86518


Compare: https://github.com/llvm/llvm-project/compare/c1e6f1a7b1a8...5ba4d0365b36