[all-commits] [llvm/llvm-project] a3e41d: [ARM] Make MachineVerifier more strict about termi...

[Sam Parker via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a3e41d45813092c91c2ccef97afd996750241069
      https://github.com/llvm/llvm-project/commit/a3e41d45813092c91c2ccef97afd996750241069
  Author: Sam Parker <sam.parker at arm.com>
  Date:   2020-08-27 (Thu, 27 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    M llvm/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll
    M llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
    M llvm/test/CodeGen/ARM/atomic-cmpxchg.ll
    M llvm/test/CodeGen/ARM/call-tc.ll
    M llvm/test/CodeGen/ARM/cmp-bool.ll
    M llvm/test/CodeGen/ARM/cmpxchg-weak.ll
    M llvm/test/CodeGen/ARM/code-placement.ll
    M llvm/test/CodeGen/ARM/codesize-ifcvt.mir
    M llvm/test/CodeGen/ARM/constant-islands-split-IT.mir
    M llvm/test/CodeGen/ARM/csr-split.ll
    M llvm/test/CodeGen/ARM/machine-sink-multidef.ll
    M llvm/test/CodeGen/ARM/peephole-bitcast.ll
    M llvm/test/CodeGen/ARM/reg_sequence.ll
    R llvm/test/CodeGen/ARM/sched-it-debug-nodes.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/basic-tail-pred.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/ctlz-non-zeros.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
    R llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/exitcount.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/extending-loads.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-vcmp.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/massive.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multi-cond-iter-count.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiblock-massive.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-cbnz.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-reorder.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-load.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-store.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-retaining.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-add-sat.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-fabs.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-round.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-sub-sat.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-pattern-fail.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredicated-max.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-retaining.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir
    M llvm/test/CodeGen/Thumb2/constant-hoisting.ll
    M llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
    M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
    M llvm/test/CodeGen/Thumb2/mve-fma-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-tailpred.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll
    M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-selectcc.ll
    M llvm/test/DebugInfo/MIR/ARM/subregister-full-piece.mir

  Log Message:
  -----------
  [ARM] Make MachineVerifier more strict about terminators

Fix the ARM backend's analyzeBranch so it doesn't ignore predicated
return instructions, and make the MachineVerifier rule more strict.

Differential Revision: https://reviews.llvm.org/D40061