[all-commits] [llvm/llvm-project] 54a5dd: [DAGCombiner] allow store merging non-i8 truncated...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 54a5dd485c4d04d142a58c9349ada0c897cbeae6
      https://github.com/llvm/llvm-project/commit/54a5dd485c4d04d142a58c9349ada0c897cbeae6
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-08-26 (Wed, 26 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/merge-trunc-store.ll
    M llvm/test/CodeGen/X86/stores-merging.ll

  Log Message:
  -----------
  [DAGCombiner] allow store merging non-i8 truncated ops

We have a gap in our store merging capabilities for shift+truncate
patterns as discussed in:
https://llvm.org/PR46662

I generalized the code/comments for this function in earlier commits,
so we only need ease the type restriction and adjust the address/endian
checking to make this work.

AArch64 lets us switch endian to make sure that patterns are matched
either way.

Differential Revision: https://reviews.llvm.org/D86420