[all-commits] [llvm/llvm-project] 61dfa0: [MC][SVE] Fix data operand for instruction alias o...

Francesco Petrogalli via All-commits all-commits at lists.llvm.org
Wed Aug 26 11:23:46 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 61dfa009579f10e75ef110a80c3e5b657ec5867a
      https://github.com/llvm/llvm-project/commit/61dfa009579f10e75ef110a80c3e5b657ec5867a
  Author: Francesco Petrogalli <francesco.petrogalli at arm.com>
  Date:   2020-08-26 (Wed, 26 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/MC/AArch64/SVE/st1b.s
    M llvm/test/MC/AArch64/SVE/st1d.s
    M llvm/test/MC/AArch64/SVE/st1h.s
    M llvm/test/MC/AArch64/SVE/st1w.s

  Log Message:
  -----------
  [MC][SVE] Fix data operand for instruction alias of `st1d`.

The version of `st1d` that operates with vector plus immediate
addressing mode uses the alias `st1d { <Zn>.d }, <Pg>, [<Za>.d]` for
rendering `st1d { <Zn>.d }, <Pg>, [<Za>.d, #0]`. The disassembler was
generating `<Zn>.s` instead of `<Zn>.d>`.

Differential Revision: https://reviews.llvm.org/D86633




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