[all-commits] [llvm/llvm-project] 75d159: [LegalizeTypes] Add ROTL/ROTR to ScalarizeVectorRe...

[jayfoad via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 75d159f924868ec93e3008b04b637412b64de29e
      https://github.com/llvm/llvm-project/commit/75d159f924868ec93e3008b04b637412b64de29e
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-08-26 (Wed, 26 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  Log Message:
  -----------
  [LegalizeTypes] Add ROTL/ROTR to ScalarizeVectorResult.

We can scalarize these just like any other binary operation.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47303 caused by D77152.

Differential Revision: https://reviews.llvm.org/D86601