[all-commits] [llvm/llvm-project] 349786: [AMDGPU] Remove uses of Register::isPhysicalRegist...

[jayfoad via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 34978602032fbd312998c8c3ef32316717013254
      https://github.com/llvm/llvm-project/commit/34978602032fbd312998c8c3ef32316717013254
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-08-20 (Thu, 20 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
    M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
    M llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.h
    M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
    M llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
    M llvm/lib/Target/AMDGPU/R600MachineScheduler.h
    M llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/R600RegisterInfo.h
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
    M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
    M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
    M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
    M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
    M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp

  Log Message:
  -----------
  [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister

... in favour of the isPhysical/isVirtual methods.