[all-commits] [llvm/llvm-project] 40e269: [GlobalISel] Add a combine for ashr(shl x, c), c -...

AE via All-commits all-commits at lists.llvm.org
Tue Aug 18 10:42:38 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 40e269ea6db9c755c27e2ee1e201a640ac085afd
      https://github.com/llvm/llvm-project/commit/40e269ea6db9c755c27e2ee1e201a640ac085afd
  Author: Amara Emerson <amara at apple.com>
  Date:   2020-08-18 (Tue, 18 Aug 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll

  Log Message:
  -----------
  [GlobalISel] Add a combine for ashr(shl x, c), c --> sext_inreg x, c'

By detecting this sign extend pattern early, we can uncover opportunities for
more optimizations.

Differential Revision: https://reviews.llvm.org/D85965


  Commit: 04a6ea5d77e7613a5e1398ddf2a0fcb4e1cea41c
      https://github.com/llvm/llvm-project/commit/04a6ea5d77e7613a5e1398ddf2a0fcb4e1cea41c
  Author: Amara Emerson <amara at apple.com>
  Date:   2020-08-18 (Tue, 18 Aug 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir

  Log Message:
  -----------
  [GlobalISel] Add a combine for sext_inreg(load x), c --> sextload x

This is restricted to single use loads, which if we fold to sextloads we can
find more optimal addressing modes on AArch64.

This also fixes an overload the MachineFunction::getMachineMemOperand() method
which was incorrectly using the MF alignment instead of the MMO alignment.

Differential Revision: https://reviews.llvm.org/D85966


Compare: https://github.com/llvm/llvm-project/compare/55565752306e...04a6ea5d77e7


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