[all-commits] [llvm/llvm-project] abd33b: [X86][AVX] lowerShuffleWithPERMV - pad 128/256-bit...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: abd33bf5eff2419e0f49ce494039bceefe8e1085
      https://github.com/llvm/llvm-project/commit/abd33bf5eff2419e0f49ce494039bceefe8e1085
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-08-18 (Tue, 18 Aug 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
    M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll

  Log Message:
  -----------
  [X86][AVX] lowerShuffleWithPERMV - pad 128/256-bit shuffles on non-VLX targets

Allow non-VLX targets to use 512-bits VPERMV/VPERMV3 for 128/256-bit shuffles.

TBH I'm not sure these targets actually exist in the wild, but we're testing for them and its good test coverage for shuffle lowering/combines across different subvector widths.