[all-commits] [llvm/llvm-project] 79298a: AMDGPU: Remove SIFixupVectorISel pass

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 79298a506707a2cfcffdd7b0346322e5d90776fc
      https://github.com/llvm/llvm-project/commit/79298a506707a2cfcffdd7b0346322e5d90776fc
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    R llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp
    M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
    R llvm/test/CodeGen/AMDGPU/global-load-store-atomics.mir
    R llvm/test/CodeGen/AMDGPU/global-saddr.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
    M llvm/test/CodeGen/AMDGPU/madak.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-store.ll
    M llvm/test/CodeGen/AMDGPU/memory_clause.ll
    M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll

  Log Message:
  -----------
  AMDGPU: Remove SIFixupVectorISel pass

This was only used for matching the saddr addressing mode of global
instructions, but this was not implemented correctly. The instruction
definitions aren't even correct, and are defined as using a 64-bit
VGPR component. Eliminate this pass to enable correcting the
instruction definitions. A new matching implementation can work in
GlobalISel or relying on DAG divergence information for the base
address.


  Commit: 47af1ac69af90f87ad6e365310db6d1e2b28be9e
      https://github.com/llvm/llvm-project/commit/47af1ac69af90f87ad6e365310db6d1e2b28be9e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
    M llvm/test/MC/AMDGPU/flat-global.s
    M llvm/test/MC/AMDGPU/gfx1030_new.s
    M llvm/test/MC/Disassembler/AMDGPU/flat_gfx9.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt

  Log Message:
  -----------
  AMDGPU: Correct definitions for global saddr instructions

The VGPR component is a 32-bit offset, not 64-bits.

I'm not sure what the correct syntax is for this. This maintains the
vaddr position and leaves saddr in the end "off" position. This is
particularly terrible for stores, since the operand order is now <vgpr
offset>, <data>, <sgpr base>, splitting the pointer operands. I
suppose this is a logical consequence from the mistake of not putting
the data operand first. I'm not sure what sp3 does.


  Commit: 8cb022982a3c64c04511dec7d1e74be00a922c31
      https://github.com/llvm/llvm-project/commit/8cb022982a3c64c04511dec7d1e74be00a922c31
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td

  Log Message:
  -----------
  AMDGPU: Remove redundant FLAT complex patterns

These were identical to the non-atomic cases. I'm not sure why these
were ever separated.


  Commit: e5077b5c2ade470405721982f897352d611910bd
      https://github.com/llvm/llvm-project/commit/e5077b5c2ade470405721982f897352d611910bd
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll

  Log Message:
  -----------
  AMDGPU: Fix matching wrong offsets for global atomic loads

These used signed offsets with a different size.


  Commit: 625db2fe5b242cb1a0888dc5a588b2de90ceef71
      https://github.com/llvm/llvm-project/commit/625db2fe5b242cb1a0888dc5a588b2de90ceef71
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td

  Log Message:
  -----------
  AMDGPU: Remove slc from flat offset complex patterns

This was always set to 0. Use a default value of 0 in this context to
satisfy the instruction definition patterns. We can't unconditionally
use SLC with a default value of 0 due to limitations in TableGen's
handling of defaulted operands when followed by non-default operands.


  Commit: a7455652c04c927bc967d7c3f7bda90620d5d546
      https://github.com/llvm/llvm-project/commit/a7455652c04c927bc967d7c3f7bda90620d5d546
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
    M llvm/test/MC/AMDGPU/gfx1030_new.s
    M llvm/test/MC/Disassembler/AMDGPU/flat_gfx9.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt

  Log Message:
  -----------
  AMDGPU: Fix global atomic saddr operand class


  Commit: f0af434b79e8b67ebcdcd1bdc526e27cd068f669
      https://github.com/llvm/llvm-project/commit/f0af434b79e8b67ebcdcd1bdc526e27cd068f669
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/FLATInstructions.td

  Log Message:
  -----------
  AMDGPU: Remove register class params from flat memory patterns


  Commit: 04a288f0f0205dfe4c8a20a4fdbdbe7dd19a8844
      https://github.com/llvm/llvm-project/commit/04a288f0f0205dfe4c8a20a4fdbdbe7dd19a8844
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-15 (Sat, 15 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp

  Log Message:
  -----------
  GlobalISel: Remove unnecessary llvm::


Compare: https://github.com/llvm/llvm-project/compare/49a944af7f19...04a288f0f020