[all-commits] [llvm/llvm-project] 3136cb: [PowerPC] Implement Vector Shift Builtins

[Conanap via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3136cbe29e74e19e6cb71c5ce71e4b92a63d03d8
      https://github.com/llvm/llvm-project/commit/3136cbe29e74e19e6cb71c5ce71e4b92a63d03d8
  Author: Albion Fung <albionapc at gmail.com>
  Date:   2020-08-12 (Wed, 12 Aug 2020)

  Changed paths:
    M clang/lib/Headers/altivec.h
    M clang/test/CodeGen/builtins-ppc-p10vector.c
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    A llvm/test/CodeGen/PowerPC/p10-vector-shift.ll

  Log Message:
  -----------
  [PowerPC]  Implement Vector Shift Builtins

This patch implements the builtins for the vector shifts (shl, srl, sra), and
adds the appropriate test cases for these builtins. The builtins utilize the
vector shift instructions introduced within ISA 3.1.

Differential Revision: https://reviews.llvm.org/D83338