[all-commits] [llvm/llvm-project] 701228: AMDGPU: Handle intrinsics in performMemSDNodeCombine

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 701228c4117636e6dd46564afcb8e5fbd98c13fb
      https://github.com/llvm/llvm-project/commit/701228c4117636e6dd46564afcb8e5fbd98c13fb
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-12 (Wed, 12 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
    M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll

  Log Message:
  -----------
  AMDGPU: Handle intrinsics in performMemSDNodeCombine

This avoids a possible regression in a future patch


  Commit: e14474a39a14b3c86c6c5d5ed9bf11467a0bbe9b
      https://github.com/llvm/llvm-project/commit/e14474a39a14b3c86c6c5d5ed9bf11467a0bbe9b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-12 (Wed, 12 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.fadd

Remove the intermediate transform in the DAG path. I believe this is
the last non-deprecated intrinsic that needs handling.


Compare: https://github.com/llvm/llvm-project/compare/3651658bdd11...e14474a39a14