[all-commits] [llvm/llvm-project] 95e61e: [X86] Autogenerate complete checks. NFC

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 95e61ed85c1abb7dab20ab665d6204ea66f5bf1f
      https://github.com/llvm/llvm-project/commit/95e61ed85c1abb7dab20ab665d6204ea66f5bf1f
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-08-08 (Sat, 08 Aug 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/break-false-dep.ll

  Log Message:
  -----------
  [X86] Autogenerate complete checks. NFC


  Commit: fdfdee98ac81dc7554bb2d7f5e99614e0086b4f0
      https://github.com/llvm/llvm-project/commit/fdfdee98ac81dc7554bb2d7f5e99614e0086b4f0
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-08-08 (Sat, 08 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/X86/vector-compare-simplify.ll

  Log Message:
  -----------
  [DAGCombiner] Teach SimplifySetCC SETUGE X, SINTMIN -> SETLT X, 0 and SETULE X, SINTMAX  -> SETGT X, -1.

These aren't the canonical forms we'd get from InstCombine, but
we do have X86 tests for them. Recognizing them is pretty cheap.

While there make use of APInt:isSignedMinValue/isSignedMaxValue
instead of creating a new APInt to compare with. Also use
SelectionDAG::getAllOnesConstant helper to hide the all ones
APInt creation.


Compare: https://github.com/llvm/llvm-project/compare/6d9b3cb2fb5f...fdfdee98ac81