[all-commits] [llvm/llvm-project] c58674: [X86] Don't produce bad x86andp nodes for i1 vectors

[Keno Fischer via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c58674df147ac0e2777208376bfd2b0d9acbef48
      https://github.com/llvm/llvm-project/commit/c58674df147ac0e2777208376bfd2b0d9acbef48
  Author: Keno Fischer <keno at juliacomputing.com>
  Date:   2020-08-07 (Fri, 07 Aug 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-select.ll

  Log Message:
  -----------
  [X86] Don't produce bad x86andp nodes for i1 vectors

In D85499, I attempted to fix this same issue by canonicalizing
andnp for i1 vectors, but since there was some opposition to such
a change, this commit just fixes the bug by using two different
forms depending on which kind of vector type is in use. We can
then always decide to switch the canonical forms later.

Description of the original bug:
We have a DAG combine that tries to fold (vselect cond, 0000..., X) -> (andnp cond, x).
However, it does so by attempting to create an i64 vector with the number
of elements obtained by truncating division by 64 from the bitwidth. This is
bad for mask vectors like v8i1, since that division is just zero. Besides,
we don't want i64 vectors anyway. For i1 vectors, switch the pattern
to (andnp (not cond), x), which is the canonical form for `kandn`
on mask registers.

Fixes https://github.com/JuliaLang/julia/issues/36955.

Differential Revision: https://reviews.llvm.org/D85553