[all-commits] [llvm/llvm-project] 531625: AMDGPU/GlobalISel: Fix assert on copy to vcc

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 53162567090251e98b14f979ee2f69669cec3ddd
      https://github.com/llvm/llvm-project/commit/53162567090251e98b14f979ee2f69669cec3ddd
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-06 (Thu, 06 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix assert on copy to vcc

This was trying to constrain a physical register. By the verifier's
understanding, it's impossible to have a 1-bit copy to vcc/vcc_lo so
don't try to handle physregs.


  Commit: 37894ba6612bf24060f38001122946108a770bc8
      https://github.com/llvm/llvm-project/commit/37894ba6612bf24060f38001122946108a770bc8
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-08-06 (Thu, 06 Aug 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Make s16 phi legal

If we were to have an operation with an s16 def that needs to be
executed in a waterfall loop, not having s16 legal would place an
avoidable burden on RegBankSelect to widen it.


Compare: https://github.com/llvm/llvm-project/compare/1de43bd6df74...37894ba6612b