[all-commits] [llvm/llvm-project] 23adba: [GlobalISel] Don't transform FSUB(-0, X) -> FNEG(X...

[Cameron McInally via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 23adbac9ee23c10976e40c80999abf02ecb389b7
      https://github.com/llvm/llvm-project/commit/23adbac9ee23c10976e40c80999abf02ecb389b7
  Author: Cameron McInally <mcinally at cray.com>
  Date:   2020-08-04 (Tue, 04 Aug 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

  Log Message:
  -----------
  [GlobalISel] Don't transform FSUB(-0, X) -> FNEG(X) in GlobalISel.

This patch stops unconditionally transforming FSUB(-0, X) into an FNEG(X) while building the MIR.

This corresponds with the SelectionDAGISel change in D84056.

Differential Revision: https://reviews.llvm.org/D85139